cystech electronics corp. spec. no. : c566q8 issued date : 2018.03.07 revised date : page no. : 1/9 MTA035P02Q8 cystek product specification p-channel enhancement mode power mosfet MTA035P02Q8 features ? simple drive requirement ? low on-resistance ? fast switching characteristic ? pb-free & halogen-free package symbol outline ordering information device package shipping MTA035P02Q8-0-t3-g sop-8 (rohs compliant & halogen-free package) 2500 pcs / tape & reel MTA035P02Q8 sop-8 g gate d drain s source pin 1 bv dss -20v i d @ t a =25 c, v gs =-4.5v -7.9a r ds(on) @v gs =-4.5v, i d =-7.6a 27.5 m (typ) r ds(on) @v gs =-2.5v, i d =-6a 34.0 m (typ) environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t3 : 2500 pcs / tape & reel, 13? reel product rank, zero for no rank products product name s s s g d d d d
cystech electronics corp. spec. no. : c566q8 issued date : 2018.03.07 revised date : page no. : 2/9 MTA035P02Q8 cystek product specification absolute maximum ratings (tc=25 c, unless otherwise noted) parameter symbol limits unit drain-source voltage v ds -20 gate-source voltage v gs 8 v continuous drain current @ v gs =-4.5v, t c =25 c -11 continuous drain current @ v gs =-4.5v, t c =100 c -7 continuous drain current @ v gs =-4.5v, t a =25 c -7.9 continuous drain current @ v gs =-4.5v, t a =70 c i d -6.3 pulsed drain current i dm -40 *1 avalanche current @ l=0.1mh i as -30 a avalanche energy @ l=1mh, i d =-12a, v dd =-15v e as 72 *3 repetitive avalanche energy @ l=0.05mh e ar 0.5 *2 mj t a =25 c 2.5 total power dissipation t a =70 c p d 1.6 w operating junction and storage temperature tj, tstg -55~+150 c note : *1 . pulse width limited by maximum junction temperature *2. duty cycle 1% *3. 100% tested by conditions of l=0.1mh, i as =-8a, v gs =-10v, v dd =-15v thermal data parameter symbol value unit thermal resistance, junction-to-case r jc 25 thermal resistance, junction-to-ambient (note) r ja 50 c/w note : 50c / w when mounted on a 1 in 2 pad of 2 oz copper, t 10s; 125 c/w when mounted on minimum pad. characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss -20 - - v gs =0v, i d =-250 a v gs(th) -0.5 - -1.2 v v ds = v gs , i d =-250 a g fs - 11.3 - s v ds =-10v, i d =-3a i gss - - 100 na v gs = 8v, v ds =0v - - 1 v ds =-16v, v gs =0v i dss - - 10 a v ds =-16v, v gs =0v, tj=55 c - 27.5 38 v gs =-4.5v, i d =-7.6a *r ds(on) - 34.0 48 m v gs =-2.5v, i d =-6a dynamic qg *1, 2 - 20 26 qgs *1, 2 - 2.8 - qgd *1, 2 - 5 - nc v ds =-10v, i d =-5a, v gs =-4.5v ciss - 1913 - coss - 160 - crss - 125 - pf v ds =-10v, v gs =0v, f=1mhz
cystech electronics corp. spec. no. : c566q8 issued date : 2018.03.07 revised date : page no. : 3/9 MTA035P02Q8 cystek product specification characteristics (cont. t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions dynamic t d(on) *1, 2 - 14.4 29 tr *1, 2 - 25 50 t d(off) *1, 2 - 180.4 360 t f *1, 2 - 97.2 195 ns v ds =-10v, i d =-1a, v gs =-4.5v, r g =10 source-drain diode ratings and characteristics i s *1 - - -4 i sm *3 - - -16 a v sd *1 - -0.79 -1.2 v i s =-2a, v gs =0v trr - 10.5 - ns qrr - 4.5 - nc i f =-6.8a, di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature. recommended soldering footprint
cystech electronics corp. spec. no. : c566q8 issued date : 2018.03.07 revised date : page no. : 4/9 MTA035P02Q8 cystek product specification typical characteristics typical output characteristics 0 5 10 15 20 25 30 35 40 012345 -v ds , drain-source voltage(v) -i d , drain current (a) 10v, 9v, 8v, 7v, 6v,5v,4v,3v -v gs =2v 2.5v brekdown voltage vs ambient temperature 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -bv dss , normalized drain-source breakdown voltage i d =-250 a, v gs = 0v static drain-source on-state resistance vs drain current 10 100 0.01 0.1 1 10 100 -i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) -v gs =4.5v -v gs =2.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 0 4 8 12 16 20 -i dr , reverse drain current (a) -v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 5 10 15 20 25 30 35 40 45 50 012345678 -v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =-7.6a i d =-6a drain-source on-state resistance vs junction tempearture 0.6 0.8 1 1.2 1.4 1.6 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =-4.5v, i d =-7.6a r ds( on) @tj=25c : 27.5m typ.
cystech electronics corp. spec. no. : c566q8 issued date : 2018.03.07 revised date : page no. : 5/9 MTA035P02Q8 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 10000 048121620 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -v gs(th) , normalized threshold voltage i d =-250 a i d =-1ma forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) pulsed ta=25c v ds =-10 v gate charge characteristics 0 1 2 3 4 5 6 7 8 0 5 10 15 20 25 30 35 40 qg, total gate charge(nc) -v gs , gate-source voltage(v) v ds =-10v i d =-5a maximum safe operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 -v ds , drain-source voltage(v) -i d , drain current (a) dc 10ms 100ms 1ms 100 s t a =25c, tj=150c, v gs =-4.5v, r ja =50c/w, single pulse maximum drain current vs junctiontemperature 0 1 2 3 4 5 6 7 8 9 10 25 50 75 100 125 150 175 tj, junction temperature(c) -i d , maximum drain current(a) t a =25c, v gs =-4.5v, r ja =50c/w
cystech electronics corp. spec. no. : c566q8 issued date : 2018.03.07 revised date : page no. : 6/9 MTA035P02Q8 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 5 10 15 20 25 30 35 40 012345 -v gs , gate-source voltage(v) -i d , drain current (a) -v ds =5v single pulse power rating, junction to ambient (note on page 2) 0 50 100 150 200 250 300 350 400 450 500 0.0001 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j(max) =150c t a =25c r ja =50c/w transient thermal response curves 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t 1 , square wave pulse duration(s) r(t), normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *r jc (t) 4.r ja =50 c/w
cystech electronics corp. spec. no. : c566q8 issued date : 2018.03.07 revised date : page no. : 7/9 MTA035P02Q8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c566q8 issued date : 2018.03.07 revised date : page no. : 8/9 MTA035P02Q8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note :1. all temperatures refer to topside of the package, measured on the package body surface. 2.for devices mounted on fr-4 pcb of 1. 6mm or equivalent grade pcb. if other grade pcb is used, care should be taken to match the coeffi cients of thermal expansion betw een components and pcb. if they are not matched well, the solder joints may crack or the bodies of the parts may crack or shatter as the assembly cools.
cystech electronics corp. spec. no. : c566q8 issued date : 2018.03.07 revised date : page no. : 9/9 MTA035P02Q8 cystek product specification sop-8 dimension millimeters inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 1.35 1.75 0.053 0.069 e 1.270 (bsc) 0.050 (bsc) a(1) 0.10 0.25 0.004 0.010 h 5.80 6.20 0.228 0.244 b 0.38 0.51 0.015 0.020 l 0.50 0.93 0.020 0.037 c 0.19 0.25 0.007 0.010 0 8 0 8 d 4.80 5.00 0.189 0.197 h 0.25 0.50 0.010 0.020 e 3.80 4.00 0.150 0.157 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . marking: 8-lead sop-8 plastic package cystek packa g e code: q8 date code device name a035 p02
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